Why Hold Time is independent of clock frequency?

Another way to ask this question is: Why is hold check done on the same cycle, and not on the next cycle like it is done for setup check? Hint: The answer is not “because there is no frequency component in the hold time equation”.

Both these questions have the same answer which we will explore in this article today. While doing so, we will also see how the equation of hold time came to be.

Hold check basically does what it says, it checks whether the flop can hold its value for a specific time period or not. The data that was launched at the current edge, should not travel to the capturing flop too early. It ensures that the data is stable until the hold requirement for the next flop has been met, so that present state is not corrupted. If hold check is violated, data intended to be captured at the next edge will get captured at the same edge.

So, you see why hold check is done on the same clock edge, and you can also see why frequency plays no role here. Only the delay a data path sees is responsible for the hold time check.

Consider the following picture:

A typical STA setup with two flops

When the data leaves flop 1, it sees two delays: Clock-to-q delay of flop 1, and the combinational delay. These two delays should be able to provide enough delay to the data that it does not reach the flop 2 before it’s hold time, and that is how the hold time equation of a flop came to be:

Tc2q + Tcomb > Th

Again, it is easy to see there is no role of time period of clock here, and hence hold time is independent of clock frequency.

That was a short article on hold time concept, I hope it makes the STA concept a little bit more easy to understand for you. I will see you in the next article!